Page 1 of 1

Enable PortH as GPIO

PostPosted: Fri May 14, 2010 3:37 pm
by kakanakov
All GPIO signals are mapped to device pins. The Syscon DeviceCfg register contains four bits that control mapping of the GPIO Ports to device pins: GonK, EonIDE, GonIDE, and HonIDE. Default all ports E, G and H are set to IDE mode. To use them as GPIO, you must set '1' to appropriate bits in DeviceCfg register.

The DeviceCfg register
DeviceCFG.png (16.87 KiB) Viewed 31770 times

Address: 0x8093_0080 - Read/Write, Software locked
Default: 0x0000_0000
Definition: Device Configuration Register. This register controls the operation of major system functions.
Bit functions for ports: PortE - bit 8, port G - bit 10, port H - bit 11
EonIDE: 0 - GPIO Port E used for IDE; 1 - GPIO Port E used for GPIO;
GonIDE: 0 - GPIO Port G used for IDE; 1 - GPIO Port G used for GPIO
HonIDE: 0 - GPIO Port H used for IDE; 1 - GPIO Port H used for GPIO.

The Device config register is part of Syscon register block.
Syscon1.png (101.35 KiB) Viewed 31771 times

The SW Lock field identifies registers with a software lock. A software lock prevents the register from being written (unless an unlock operation is performed immediately prior to the write). Any register whose accidental alteration could cause system damage may be controlled with a software lock. Each peripheral with software lock capability has its own software lock register. A software lock register must be written with 0xAA before each register write to change the values of the control registers.
For all Syscon registers there is a single software lock register: SysSWLock
SysSWLock.png (8.82 KiB) Viewed 31770 times

Address: 0x8093_00C0 - Read/Write
Default: 0x0000_0000
Definition: Syscon Software Lock Register. Provides software control port for all Syscon locked registers. Writing the LOCK field to 0xAA opens the lock. Reading the register will return 0x0000_0001 when the lock is open, and all zeros when the lock is closed (locked).
Bit Descriptions:
RSVD: Reserved. Unknown During Read.
LOCK: Lock code value. This field must be written to a value of 0xAA to open the software lock. Reads 0x01 when the lock is open, 0x00 when the lock is closed.

Re: Enable PortH as GPIO

PostPosted: Fri May 14, 2010 3:48 pm
by kakanakov
So, to enable ports E, G and H, you must change the DeviceCfg register.
DeviceCfg |= 0x00000100 ; for port E
DeviceCfg |= 0x00000400 ; for port G
DeviceCfg |= 0x00000800 ; for port H
DeviceCfg |= 0x00000d00 ; for all three ports
We use '|=' to preserve values of all other bits in the DeviceCfg register.

But before doing this we must unlock the register by writing 0xAA to SysSWLock.

Re: Enable PortH as GPIO

PostPosted: Fri May 14, 2010 3:53 pm
by kakanakov
A simple program in assmebler :-)
Code: Select all
; read the old value of DeviceCfg
ldr r1, =0x80930080
ldr r0, [r1]
; change the bit 11 of read value to '1' to enable PortH as GPIO
ldr r2, =0x08000800
orr r2, r0, r2
; write '0xAA' to SysSWLock to unlock DeviceCfg
ldr r1, =0x809300c0
ldr r0, =0xaa
str r0, [r1]
; write new value to DeviceCfg
ldr r1, =0x80930080
str r2, [r1];

Re: Enable PortH as GPIO

PostPosted: Fri May 14, 2010 3:59 pm
by kakanakov
You can enable portH as GPIO under Linux OS using some binaries.

# peek32 0x80930080
=> This reads the "DeviceCfg" register
# peek8 0x809300c0
=> We read the "SysSWlock" register and this outputs 0x0, which means that access to control registers is locked. We will unlock it with the following
# poke8 0x809300c0 0xaa
# peek8 0x809300c0
=> This should now outputs 0x1, which means that our lock is opened. We can thus now write the new value to "DeviceCfg":
# poke32 0x80930080 0x800
=> We just wrote the new value for register "DeviceCfg", where bit 11 is set to 1.

You can downolad peek_poke binaries from the links below:

The original link for the binaries and their source is: